DFT Engineer

This role is for one of the Weekday's clients Min Experience: 3+ years Location: Bengaluru JobType: full-time We are looking for a skilled DFT Engineer to join our semiconductor design team and contribute to the development of high-quality, testable ASIC and SoC designs. In this role, you will work closely with Design, Verification, Physical Design, and ATPG teams to implement and validate Design-for-Test (DFT) architectures that ensure robust manufacturing test coverage and product quality. The ideal candidate has hands-on experience with DFT methodologies, scan insertion, ATPG, and silicon bring-up, along with a strong understanding of digital design and semiconductor development flows. Requirements Key Responsibilities - Design, implement, and validate DFT architectures for ASIC and SoC designs. - Develop and integrate DFT features such as scan chains, boundary scan (JTAG), MBIST, LBIST, and test compression. - Perform scan insertion, DFT rule checks (DRC), and ATPG pattern generation to achieve high fault coverage. - Collaborate with RTL Design, Verification, Physical Design, and Test Engineering teams throughout the chip development lifecycle. - Analyze and debug DFT-related issues during implementation, simulation, and silicon bring-up. - Optimize test coverage, test time, and manufacturing test efficiency while meeting quality and cost objectives. - Support timing closure and physical implementation for DFT logic. - Develop and maintain DFT documentation, test plans, and implementation guidelines. - Participate in design reviews and contribute to continuous improvements in DFT methodologies and flows. Required Qualifications - Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or a related field. - 3.5+ years of experience in Design-for-Test (DFT) engineering. - Strong understanding of DFT concepts including Scan, ATPG, MBIST, LBIST, JTAG, and test compression. - Experience with industry-standard DFT and ATPG tools. - Good knowledge of digital design, RTL, and semiconductor design flows. - Familiarity with Verilog/SystemVerilog and simulation/debug methodologies. - Strong analytical, debugging, and problem-solving skills. - Excellent communication and collaboration abilities. Preferred Qualifications - Experience with ASIC or SoC development. - Knowledge of synthesis, STA, and Physical Design flows. - Familiarity with scripting languages such as TCL, Perl, or Python. - Experience supporting silicon validation and manufacturing test. - Understanding of low-power design and DFT implementation. Must-Have Skills - Design for Test (DFT) - Scan Insertion - ATPG - MBIST - JTAG - Verilog/SystemVerilog Good-to-Have Skills - LBIST - Test Compression - TCL - Perl - Python - Static Timing Analysis (STA) - Physical Design - ASIC/SoC Development